Joint evaluation pairs the congestion-free CN5000 fabric with the Maverick-2 dataflow accelerator to attack the two bottlenecks that idle AI and HPC systems. HAMBURG, Germany, June 22, 2026 —Cornelis and NextSilicon today announced at ISC High Performance 2026 a collaboration to build and evaluate joint reference architectures for AI and high-performance computing. The work pairs […] The post Cornelis and NextSilicon to Build Joint Reference Architectures for AI and HPC appeared first on HPCwire .

Source: HPCwire — read the full report at the original publisher.

This is a curated wire item. The Continuum Brief does not republish full third-party articles; this entry links to the original source.