Cadence and Intel Foundry Expand DTCO Partnership for Intel 14A Process
Expanded cooperation spans DTCO, IP readiness and design enablement to advance next-generation customer innovation SAN JOSE, Calif., June 9, 2026 — Cadence has announced an expanded collaboration with Intel Foundry to advance Design Technology Co-Optimization (DTCO) targeting Intel’s next-generation process technologies, beginning with Intel 14A. The new multi-year agreement combines Cadence’s agentic AI-driven EDA and Design […] The post Cadence and Intel Foundry Expand DTCO Partnership for Intel 14A Process appeared first on HPCwire .
The increasing complexity of advanced semiconductor nodes and the imperative for accelerated design cycles are driving deeper collaborations between EDA vendors and foundries.
This partnership is critical for enabling the next generation of computing, impacting everything from AI acceleration to high-performance computing, by streamlining the design and manufacturing of leading-edge chips.
The expanded DTCO collaboration between Cadence and Intel Foundry will likely accelerate the readiness and adoption of Intel's 14A process, potentially influencing market share in advanced semiconductor manufacturing.
- · Intel Foundry
- · Cadence
- · AI/HPC developers
- · Semiconductor industry
- · Competitors with less integrated design and manufacturing flows
Faster and more efficient development of chips on Intel's 14A process.
Increased competitiveness for Intel Foundry in the leading-edge silicon market against TSMC and Samsung.
Potential for new innovations in AI and HPC applications due to optimized underlying hardware.
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