Multi-year agreement expands Memory, NVIDIA NVLink-C2C and advanced Interface IP, and agentic AI-optimized GPU‑accelerated EDA and SDA flows on Samsung Foundry’s second-generation 2nm node for next-generation AI infrastructure and physical AI designs SAN JOSE, Calif. and SEOUL, South Korea, May 29, 2026 — Cadence and Samsung Foundry have announced development of a full portfolio of Memory […] The post Cadence and Samsung Foundry Deepen 2nm and 3D‑IC Collaboration appeared first on HPCwire .
The accelerating demand for advanced AI compute, specifically for next-generation AI infrastructure and physical AI designs, drives the urgency for closer collaboration in leading-edge semiconductor manufacturing. This occurs as 2nm nodes become critical for performance and power efficiency in AI workloads.
This collaboration is critical for securing a highly competitive supply chain for advanced AI silicon, directly impacting the performance and availability of future AI systems. It demonstrates the continued push for higher integration and efficiency in compute, which is a foundational requirement for AI progress.
The deepened collaboration between Cadence and Samsung Foundry expands the availability of advanced IP and EDA flows for 2nm and 3D-IC designs, accelerating the development cycle for next-generation AI chips. This improves the ecosystem for AI hardware innovation, particularly benefiting partners leveraging Samsung Foundry's advanced nodes.
- · Cadence Design Systems
- · Samsung Foundry
- · NVIDIA
- · AI infrastructure developers
- · Competitors with less advanced EDA/Foundry partnerships
- · Firms reliant on older process technologies for AI
Increased pace of innovation and efficiency in advanced AI chips.
Potential for new AI applications and capabilities due to enhanced hardware performance, possibly impacting fields like robotics and advanced analytics.
Further consolidation of advanced semiconductor manufacturing and EDA alliances, creating higher barriers to entry for new players.
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