Cornelis and NextSilicon to Build Joint Reference Architectures for AI and HPC
Joint evaluation pairs the congestion-free CN5000 fabric with the Maverick-2 dataflow accelerator to attack the two bottlenecks that idle AI and HPC systems. HAMBURG, Germany, June 22, 2026 —Cornelis and NextSilicon today announced at ISC High Performance 2026 a collaboration to build and evaluate joint reference architectures for AI and high-performance computing. The work pairs […] The post Cornelis and NextSilicon to Build Joint Reference Architectures for AI and HPC appeared first on HPCwire .
The increasing demands of AI and HPC workloads are creating significant bottlenecks in data transfer and processing, necessitating innovative hardware collaborations to overcome these limitations.
This collaboration addresses critical performance bottlenecks in AI and HPC, directly impacting the efficiency and scale of future computational advancements. It signifies a hardware-level evolution crucial for sustained progress in these fields.
The development of joint reference architectures combining advanced fabrics and accelerators will lead to more efficient and powerful AI/HPC systems, potentially raising performance benchmarks and influencing future hardware design standards.
- · Cornelis Networks
- · NextSilicon
- · AI/HPC system integrators
- · Data centers
- · Traditional interconnect providers
- · Less innovative accelerator companies
The new reference architectures will enable researchers and enterprises to run larger and more complex AI and HPC models faster.
This could lead to a competitive advantage for adopters of these technologies, accelerating breakthroughs in various scientific and industrial applications.
The enhanced computational capabilities could drive further innovation in AI algorithms and models, potentially altering the competitive landscape for major tech players.
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