As high-NA EUV approaches, mask makers need new metrics, model-based checks, and curvilinear-native data flows to keep turn times and defect escapes under control. The post Curvilinear Masks Push The Limits Of Inspection And Metrology appeared first on Semiconductor Engineering .
The semiconductor industry is pushing the limits of lithography with high-NA EUV, driving the need for advanced mask technologies like curvilinear masks and placing new demands on inspection and metrology.
This development is critical for maintaining Moore's Law and enabling next-generation chip manufacturing, directly impacting the entire compute supply chain and future technological advancements.
The shift to curvilinear masks necessitates entirely new inspection techniques, model-based checks, and data flows, moving beyond traditional mask processing paradigms.
- · ASML
- · Applied Materials
- · KLA Corporation
- · Semiconductor Foundries
- · Legacy inspection equipment providers
- · Mask shops unable to adapt
Increased R&D investment and collaboration between lithography equipment manufacturers, mask makers, and metrology companies.
Potential delays or cost increases in chip manufacturing if inspection and metrology challenges are not rapidly overcome.
Impact on compute power availability and cost, influencing progress in AI, HPC, and other compute-intensive fields.
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