arXiv:2602.21321v2 Announce Type: replace Abstract: Analog in-memory computing (AIMC) performs computation directly within resistive crossbar arrays, offering an energy-efficient platform to scale large vision and language models. However, non-ideal analog device properties make the training on AIMC devices challenging. In particular, its update asymmetry can induce a systematic drift of weight updates towards a device-specific symmetric point (SP), which typically does not align with the optimum of the training objective. To mitigate this bias, most existing works assume the SP is known and p
This paper addresses a fundamental challenge in analog in-memory computing, a technology critical for scaling AI models efficiently, which is gaining urgency as larger models demand more performant hardware.
Improving the training accuracy and reliability of analog in-memory computing devices could significantly enhance the energy efficiency and computational capabilities of future AI models, impacting the entire compute supply chain and AI development.
The proposed 'Dynamic Symmetric Point Tracking' method offers a way to mitigate intrinsic hardware limitations in analog in-memory computing, potentially leading to more robust and higher-performing AI accelerators.
- · AI hardware developers
- · Semiconductor manufacturers
- · Large language model developers
- · Energy-efficient computing initiatives
- · Traditional digital AI accelerator architectures (relative cost/performance)
- · AI developers reliant solely on cloud-based compute for training
More accurate analog in-memory training leads to more performant and energy-efficient AI chips.
The widespread adoption of such chips reduces the energy footprint of large-scale AI training and inference.
Lower compute costs and higher efficiency accelerate the development of even larger and more complex AI models, potentially shifting the competitive landscape in AI.
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Read at arXiv cs.LG