arXiv:2606.12816v2 Announce Type: replace-cross Abstract: Quantum circuit routing is a key step in compiling programs for noisy intermediate-scale quantum processors. Routes that appear efficient by standard overhead metrics can still lose fidelity when they pass through poorly calibrated couplers. We study a calibration-aware graph reinforcement-learning router that uses same-day IBM Heron r2 calibration data to choose hardware-edge SWAPs. We train the policy with proximal policy optimization and evaluate it with exact simulated fidelity across nine Munich Quantum Toolkit (MQT) Bench circuits
The increasing maturity of noisy intermediate-scale quantum (NISQ) processors and the growing need for efficient compilation strategies to maximize their limited performance necessitates advanced routing solutions.
This development addresses a critical bottleneck in quantum computing by improving circuit fidelity on current hardware, which is essential for advancing quantum algorithm development and practical applications.
Quantum circuit routing can now proactively integrate real-time hardware calibration data, moving beyond theoretical overhead metrics to optimize for actual machine performance and significantly reduce error rates.
- · Quantum hardware manufacturers (e.g., IBM)
- · Quantum computing researchers
- · Developers of quantum algorithms
- · AI/ML for scientific computing
- · Traditional quantum compilers that ignore calibration data
- · Purely theoretical quantum optimization approaches
Improved performance and reliability of quantum processors due to more efficient and hardware-aware circuit compilation.
Accelerated development and experimentation with more complex quantum algorithms as hardware becomes more robust to errors.
Potential for quantum computers to achieve practical utility in specific domains sooner than previously anticipated, potentially impacting compute-intensive industries.
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