High-Speed Manufacturing And In-Field Scan Test Access Via PCI Express For GPIO Limited SoCs
Enabling faster, more scalable, and lifecycle-wide testing while conserving limited pins. The post High-Speed Manufacturing And In-Field Scan Test Access Via PCI Express For GPIO Limited SoCs appeared first on Semiconductor Engineering .
The increasing complexity and performance demands of SoCs, coupled with the need for cost-effective and in-field testing, drive the development of new testing methodologies.
This development allows for more efficient and comprehensive testing of advanced silicon, which is critical for the reliability and performance of modern electronic systems, especially those with I/O limitations.
The ability to utilize high-speed I/O like PCIe for integrated testing pathways significantly reduces the reliance on traditional GPIO pins, streamlining manufacturing and enabling new in-field diagnostics.
- · Semiconductor manufacturers
- · Test equipment providers
- · High-performance computing sector
- · Edge AI device manufacturers
- · Companies reliant on legacy test methodologies
- · Complex SoC designs without integrated test access provisions
Manufacturing costs for complex SoCs decrease due to more efficient testing processes.
Improved silicon quality and reliability for devices requiring continuous operation or field upgrades.
Accelerated development of more complex and integrated SoCs due to reduced test bottlenecks.
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