arXiv:2512.12850v3 Announce Type: replace-cross Abstract: Low-latency, resource-efficient neural network inference on FPGAs is essential for applications demanding real-time capability and low power. Lookup table (LUT)-based neural networks are a common solution, combining strong representational power with efficient FPGA implementation. In this work, we introduce KANEL\'E, a framework that exploits the unique properties of Kolmogorov-Arnold Networks (KANs) for FPGA deployment. Unlike traditional multilayer perceptrons (MLPs), KANs employ learnable one-dimensional splines with fixed domains as
The continuous demand for higher efficiency and lower latency in AI inference, especially for real-time and embedded applications, drives the development of specialized hardware and network architectures like KANs.
This work introduces a novel method to deploy Kolmogorov-Arnold Networks (KANs) efficiently on FPGAs, potentially accelerating AI inference in resource-constrained environments and expanding the practical applicability of KANs.
The existing landscape for efficient AI inference, particularly on FPGAs, is augmented by a new framework that leverages KANs' representational power with LUT-based implementation, offering an alternative to traditional MLPs.
- · FPGA manufacturers
- · Embedded AI developers
- · Real-time computing applications
- · Edge AI providers
- · Inefficient general-purpose neural network architectures
- · High-latency AI inference solutions
Improved performance and reduced power consumption for AI models in specific embedded and real-time use cases.
Increased adoption of KANs in hardware-constrained AI applications, potentially challenging the dominance of MLPs in certain domains.
New classes of AI-powered devices and systems become feasible due to enhanced real-time processing capabilities on low-power hardware.
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