arXiv:2606.24046v1 Announce Type: cross Abstract: This work presents a machine learning framework that leverages an autoencoder (AE) for the efficient modeling of FinFET. We first calibrated a BSIM-CMG model to generate a dataset of current-voltage (ID-VG) characteristics. This data was used to train an autoencoder that compresses full I-V curves into a low-dimensional latent space, which intrinsically encodes key device physics. A key innovation is the explicit incorporation of parameter such as drain to source voltage (VDS) as an input feature, enhancing the model ability to capture bias dep
The increasing complexity and cost of FinFET design and manufacturing necessitate more efficient modeling techniques, making AI/ML solutions timely.
Efficient FinFET modeling can significantly accelerate chip design cycles and optimize performance, impacting the trajectory of advanced semiconductor development.
The adoption of autoencoder-based modeling could reduce the time and computational resources required for FinFET characterization, potentially lowering design barriers.
- · Semiconductor Foundries
- · Chip Design Houses
- · AI/ML Hardware Providers
- · Traditional Simulation Software Vendors
Faster design and optimization of advanced FinFETs become possible.
This could lead to quicker iteration and innovation in leading-edge semiconductor technology.
Reduced design costs might accelerate the development of specialized chips for AI and other demanding applications, influencing global compute supply chains.
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Read at arXiv cs.AI