arXiv:2606.12765v1 Announce Type: new Abstract: Apple's Metal 4.1 exposes a tensor compute path: the Metal Performance Primitives (MPP) matmul2d operation over cooperative_tensor fragments, whose interface is documented but whose hardware behavior is deliberately hidden. The specification states which data-type rows are supported, never whether they are hardware-accelerated, where the operation physically executes, what its accumulator width is, or how it partitions matrix fragments across threads. We present Rigel, an empirical characterization of this path on a single Apple M4 Max (a pre-neu
The rapid advancement of AI necessitates efficient hardware, driving deep dives into proprietary chip architectures like Apple's M4 Max to maximize performance.
Understanding the underlying tensor compute paths on custom silicon is crucial for optimizing AI software and influencing future hardware design, especially for on-device AI.
This reverse-engineering initiative offers unprecedented insight into the actual execution of AI operations on Apple's latest hardware, moving beyond documented interfaces.
- · Apple (ecosystem development)
- · AI software developers
- · On-device AI applications
- · Hardware reverse-engineers
- · Hardware manufacturers with less optimized AI paths
Increased optimization of AI frameworks for Apple M-series chips.
Apple may further obscure or change its tensor compute path in future updates to maintain proprietary advantage.
This work could accelerate the development of alternative AI accelerators by providing a benchmark for performance and design considerations.
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Read at arXiv cs.CL