Scaling Nanoribbon Transistors with Monolayer TMDs (Stanford, Chalmers, Horiba, SLAC)
Researchers from Stanford University, Chalmers University of Technology, HORIBA Scientific, and SLAC National Accelerator Laboratory have published “Scaling nanoribbon transistors with monolayer transition metal dichalcogenides”. Abstract “Nanoscale transistors demand aggressive scaling of all channel dimensions—length, width and thickness. Two-dimensional semiconductors (2DS) provide the ultimate thickness limit, yet good device performance has largely remained restricted to... » read more The post Scaling Nanoribbon Transistors with Monolayer TMDs (Stanford, Chalmers, Horiba, SLAC) appeared
The continuous demand for smaller, more powerful transistors drives research into novel materials and architectures like 2D semiconductors and nanoribbon GAAFETs, which are essential for future compute scaling.
This research demonstrates a potential pathway to overcome fundamental scaling limits in semiconductor manufacturing, directly impacting the future growth and capabilities of all advanced computing.
The successful integration of monolayer TMDs into nanoribbon transistor design enables continued aggressive scaling, pushing silicon's fundamental limits and potentially extending Moore's Law well into the next decade.
- · Semiconductor manufacturers
- · High-performance computing sector
- · AI hardware developers
- · Materials science researchers
- · Companies reliant on older fabrication nodes
- · Manufacturers unable to adopt new materials
- · Traditional silicon-only foundries
Experimental validation of 2D materials in advanced transistor architectures points to viable next-generation chip technology.
Increased investment in 2D material synthesis and integration techniques for high-volume manufacturing will accelerate.
New compute architectures become feasible, leading to breakthroughs in AI, data processing, and quantum computing.
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