arXiv:2605.16138v2 Announce Type: replace Abstract: Neural architecture search (NAS) is a powerful approach for automating model design, but existing methods often optimize for accuracy alone or rely on proxy metrics such as bit operations (BOPs) that correlate poorly with hardware cost. This gap is particularly large for FPGA deployment, where cost is dominated by a multi-dimensional budget of lookup tables, DSPs, flip-flops, BRAM, and latency. We present the Surrogate Neural Architecture Codesign Package (SNAC-Pack), an open-source AutoML framework for hardware-aware neural architecture code
The increasing computational demands of AI and the emphasis on hardware-efficient deployment, particularly on FPGAs, necessitates more sophisticated architectural co-design tools.
This development addresses a critical efficiency gap in AI deployment, moving beyond accuracy-only metrics to hardware-cost-aware optimization, which is vital for practical, scalable, and economical AI systems.
AI model design can now be more effectively optimized for specific hardware constraints like FPGAs, shifting from generalized proxy metrics to multi-dimensional hardware cost considerations.
- · FPGA manufacturers
- · AI hardware companies
- · On-device AI developers
- · Cloud providers
- · Companies relying solely on accuracy-driven NAS
- · Generative AI models with poor hardware optimization
More efficient and cost-effective deployment of AI models on specialized hardware, especially FPGAs.
Accelerated development of AI applications in resource-constrained environments or those requiring low latency and high power efficiency.
Potential for broader adoption of AI in industrial, edge computing, and defense contexts due to improved hardware integration and cost-efficiency.
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Read at arXiv cs.LG